wrap in slides
2026年5月5日 星期二
HW#9 RF PA Driver Design (Comparing optimization algorithms and pipelines)
課堂練習
Deadline: This Saturday at 23:59
Send all the share links to me chang212@gmail.com by email with subject HW#9 [your id, your name]
只要做第一題
1. Benchmark the three algorithms (GD, NM, A*) and their cascades (one designed by you and the other design by AI )
- For the five methods, each runs with 10 seeds
- Tabulate
Gain, Pout, PAE, OP1dB, S₁₁(5 methods = 5 tables, each table with 5 metrics × 10 seeds = 40 cells). - Visualize all of your data
Two-stage Cascode Class-AB RF PA Driver targeting 5G n78 (3.5 GHz) in TSMC 28nm RF
2026年4月28日 星期二
HW#8 Claude Cowork
課堂練習
Deadline: This Saturday at 23:59
Send all the share links to me chang212@gmail.com by email with subject HW#8 [your id, your name]
Part 1
Use Claude CoWork to benchmark BJT Differential Pair
1. Experiments with 30 seeds
schematic with parameter optimizer
2. The SA code is flawed. Therefore Ad, CMRR, PM cannot be optimized. Use Cowork to diagnose and fix the code. Rerun the bencmark.
Hint: prompts for CoWork
Prompts for Claude Chat
Part 2
Benchmark the P&R for OP 741.
Experiment with 3 seeds
Measure success, congestions, wirelength, overlap pairs (before/after), Vin length match
2026年4月27日 星期一
2026年4月19日 星期日
SWERV RISC IC Design
baseline macro 32, metal layers 3, die 550 × 600 μm
why disable QPO
best seed
no QPO
10 seeds with QPO
Bit sliced macro 28, metal layers 9, die 690 × 750 μm
2026年4月17日 星期五
Optimize PCB trace routing for the Differential Pair Circuit on PCB
Make it layer-aware with two layers
eliminate phantom
2026年4月14日 星期二
Common issues in BJT diff pair design
(by TA)
1. unfinished routing
2. one stage diff pair 是沒有 miller 電容 cc
(by TA)
1. SA 是無效的
2. 檢查是否合規
gain 47.6 db 不夠
PM 0 很危險，不穩定
GBW 太大
設計目標 (3.3V):
Ad ≥ 50 dB | CMRR ≥ 80 dB
GBW ≥ 100 MHz | PM 55°–75°
Vos ≤ 1 mV | Pd ≤ 20 mW
Poly R: 250 Ω/sq (±20%)
MIM C: 1 fF/μm² (±15%)
refer to sample
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